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## Experiment 19 - BlazeLabs Resonant Converter

Designed by Blazelabs Yahoo Group team members ©2005

Since the first design of voltage doubler network discovered, in 1919, by Heinrich Greinacher, these semiconductor networks have been gaining popularity amongst researchers, as well as finding their way into a lot of new useful appliances. Unlike transformers this method eliminates the requirement for the heavy core and the bulk of insulation/potting required. By using capacitors and diodes, semiconductor voltage multipliers can step up relatively low voltages to extremely high values, while at the same time being far lighter and cheaper than transformers. The biggest advantage of such circuit is that the voltage across each stage of this cascade, is only equal to twice the peak input voltage, so it has the advantage of requiring relatively low cost components and being easy to insulate. Voltage multipliers have various practical applications and find their way in laser systems, CRT tubes, hv power supplies, LCD backlighting, power supplies, x-ray systems, travelling wave tubes, ion pumps, electrostatic systems, air ionisers, particle accelerators, copy machines, scientific instrumentation, oscilloscopes, and many other applications that utilize high voltage DC.

In experiment 15, we found that for a classical Cockcroft Walton multipler, the dc output voltage can be closely approximated by:

E_{out}= 2/3*[2n(E_{pk}-V_{fwd})]

V_{DROP}= 1/3*[2n(E_{pk}-V_{fwd})]

Example using Standard CW multiplier

Known data: Epk = 18v peak square wave, Eout=1000v, Vfwd=0.4v, Iload=0.012A, f= 965kHz

Required number of stages: n=Round(3/4(Eout/(Epk-Vfwd))) = 43

Reactive loss V_{DROP}= 1/3*[2n(E_{pk}-V_{fwd})] = 505v

A loss-less voltage multiplier would in theory require only (Eout/2Epk) = 28 stages to multiply the 18v input to 1kV, however due to the considerable reactive voltage loss inherent in the cascade design (505v in this case), an extra 15 stages are required to make up for this loss. This clearly shows that the biggest disadvantage of the classical CW is the reactive voltage drop which increases with the number of stages. For this reason, classical CW's requiring a large number of stages result in impractical voltage losses and another multiplier type has usually to be chosen for those applications, often leading to the use of bulky/heavy transformers. A normal CW output voltage can be related to the perfect voltage multiplier by the following equation:

E.....(1)_{outCW}= E_{outPERFECT}- V_{dropCW}

E.....(2)_{outCW}= 2/3 E_{outPERFECT}

V.....(3)_{dropCW}= 1/3 E_{outPERFECT}

How does a Blazelabs Resonant Convertor (BRC) work

Blazelabs Resonant convertor is based on a resonant LCR filter network which has the effect of completely cancelling V_{dropCW}at its resonant point. An inductor is connected to the conventional CW circuit to form a resonant circuit with the capacitive component of the CW which is responsible for the lost reactive voltage. The voltage drop under load is mainly due to the effective reactance of the switched capacitor network. The idea behind Blazelabs resonant multiplier, is to incorporate the steady state effective capacitance of the switched network into a resonant RLC filter in order to make up for the voltage loss WITHOUT the requirement for extra stages. Once the inductor is in resonance with the multiplier's effective capacitance, the capacitive reactance is totally cancelled by the inductive reactance, thus cancelling V_{dropCW}and boosts the output to the E_{outPERFECT}value. Equation (1) thus becomes:

E_{outCW}= Boost*(E_{outPERFECT}- V_{dropCW}) = E_{outPERFECT}

The boost level at resonance can be easiely calculated by substitiuting for V_{dropCW}from equation(3):

E_{outCW}= Boost*(E_{outPERFECT}- 1/3E_{outPERFECT}) = E_{outPERFECT}

BOOST = E_{outPERFECT}/E_{outCW}= 3/2 = 1.5

E_{outPERFECT}= 1.5 * E_{CWout}

The BRC will thus act like a conventional CW whose output voltage has been boosted by a factor of 1.5, or like a CW with no reactive losses, in other words, like a perfect voltage multiplier!

V_{DROP}= [I_{load}/(6fC)] * (4n^{3}+ 3n^{2}- n) = 1/3(2nE_{pk})

Capacitor Ceq model the optimally loaded multiplier network capacitance as seen from its input port. A lumped inductor L completes the two pole filter circuit. The Q factor given by Q=1/R*√(L/Ceq) is set to unity, so that the resistive load at its output is perfectly matched to the characteristic impedance of the LC filter, R=Zo=√(L/Ceq). Ceq is the effective capacitance of the multiplier network as seen at its input and is equal to 1.5C/n, where C is the stage capacitance and n, the number of stages.^{*Ref(1)}

The 1.5 factor of the so formed LCR circuit will thus out balance the voltage losses inherent in the switched network, and this occurs when XL=XC

_{eq}, that is at resonance, hence the name chosen for this convertor. The voltage drop is modelled by a resistor, which forms a potential divider together with the load resistance.

From: E_{out}= 2n E_{pk}- V_{Drop}

and : E_{out}= 2/3(2n E_{pk})

we get: V_{Drop}= 1/3 (2n E_{pk})

Hence the total output resistance R is modelled by R/3 as the voltage drop resistance and 2R/3 as the actual load resistance, where R is equal to √(L/C_{eq}) at Q=1.

_{Click on diagram to run the simulation using LT Spice on your own PC}

Design guide for the Blazelabs Resonant Multiplier

You have to know E

_{inpk}, E_{out}, I_{load}and Either f or C

The result will be a BRM design running at full load at 97% efficiency.

First you find the number of stages n:

n=Round[3/4(Eout/Epk)]^{*Ref(2)}

where:E....E_{pk}=S*E_{inpk}_{inpk}is the external peak input voltage

For Q=1: S = √2

If we take into account the conversion efficiency, then we have:

n=Round{3/4[Eout/(√(2*Eff)*E........(1)_{inpk})]}

Recalculate Eout, based on the rounded number of stages:

Eout= 4/3n*E........(2)_{pk}

Then you get the product fc:

fC=I....(3)_{load}/6*(4n^{3}+ 3n^{2}- n)/(2*E_{pk}*n - E_{out})

Choose f or C and deduce the other C=(fC)/f or f=(fC)/C

Finally you find the resonant inductor that resonates at f with equivalent capacitance equal to 3C/2n^{*Ref(1)}:

f = 1/[2pi*√(L*3C/2n)]

L = n/(6*Pi........(4)^{2}*f^{2}*C)

Example of Half wave 97% Efficiency BRM with square wave input :

Einpk= 18v square wave, Eout=1000v, Iload=0.012A, f= 965kHz

=> Epk= S*√Eff*Einpk = √(2*0.97) * 18 =25.07 v

(1) => n= Round(3/4*1000/25.07)=Round(29.91)=30 stages

(2) => Eout at full load = 4/3*30*25.07 = 1003 v

(3) => fc=0.012/6*(4*30^{3}+3*30^{2}-30)/(2*25.07*30-1003)=0.4416 HzF

f is known 965E3, so C= fc/f = 0.4416/965E3 = 457.62nF

(4) => L= 30/(6*Pi^{2}*965E3^{2}*464.5E-9) = 1.19µH

_{Click on diagram to run the simulation using LT Spice on your own PC}The standard CW multiplier requires 42 stages using 1.22uF capacitors! Our BRM uses much smaller capacitors and just 30 stages, very close to the ideal loss-less multiplier which would require 28 stages.

References:

^{*}Ref(1): Megawatt HV DC Power Supplies by G.Reinhold and R.Gleyvod

^{*}Ref(2): Cockcroft Walton Optimum Design Guide by Michel Jullian

^{*}Ref(3): Cockcroft Walton Multipliers by Ing.Xavier Borg

^{*}Ref(4): CW / BRM Online Java calculator by Ing. Xavier Borg